The present application relates to a semiconductor structure and a method of forming the same. More particularly, the present application relates to a semiconductor structure including an embedded high performance magnetoresistive random access memory (MRAM) device that exhibits reduced shorting.
MRAM is a non-volatile random access memory technology in which data is stored by magnetic storage elements. These elements are typically formed from two ferromagnetic plates, each of which can hold a magnetization, separated by a thin dielectric layer. One of the two plates is a permanent magnetic set to a particular polarity; the other plate's magnetization can be changed to match that of an external field to store memory. Such a configuration is known as magnetic tunnel junction (MTJ).
For high performance MRAM based on perpendicular MTJ structures, well defined interfaces and interface control are essential. MTJ structures typically include a cobalt (Co)-based synthetic anti-ferromagnet (SAF), a cobalt-iron-boron (CoFeB)-based reference layer, a magnesium oxide (MgO)-based tunnel barrier, a CoFeB-based free layer, and capping layers containing, for example, tantalum (Ta) and/or ruthenium (Ru). Embedded MTJ structures are usually formed by patterning of blanket MTJ stacks. Reactive ion etch (RIE) processing and ion beam etch (IBE) processing of such MTJ stacks presents a major challenge, as such processing typically leads to shorts due to re-sputtering of thick bottom metal layers onto the MTJ stack sidewalls. There is thus a need for embedded MTJ structures formed by a method with a reduced risk of shorts due to metal re-sputtering.